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Intel® Xeon Phi™ Product Family

Highly parallel processing to power your breakthrough innovations

Intel® Xeon Phi™ Coprocessor

Power your breakthrough innovations with the highly parallel processing of the Intel® Xeon Phi™ coprocessor. We have packed over a teraFLOPS of double-precision peak performance into every chip.

Weather

The weather vertical needs an tremendous amount of compute capabilities to accurately predict weather all over the world, including the formation of tornados, the direction of a hurricane, and rain fall predictions. Weather Research and Forecasting (WRF) is one of the more frequently used weather simulation packages.

Intel Measured as of May 2014

Configuration Details

WRF v3.5.1:

Hardware: Two-socket server with Intel® Xeon® processor E5-2697 v2 (12C, 2.7 GHz, 130W), each node equipped with one Intel® Xeon Phi™ coprocessor (7120 c0, 61 core, 1.238 GHz, 16 GB at 5.5 GT/s) in a four-node Fourteen Data Rate (FDR) cluster.

WRF is available from the US National Center for Atmospheric Research in Boulder, Colorado; it is available from http://www.wrf-model.org/.

Intel® Manycore Platform Software Stack (Intel® MPSS) 6720-16, Compiler rev 192, Intel® MPI Library rev 3.6

WRF CONUS2.5km workload available from www.mmm.ucar.edu/wrf/WG2/bench/.

Performance comparison is based upon average timestep. We ignore initialization and post simulation file operations.

Conus2.5km run ATS KNC "Profit" % 4x12x2-20+0x0x0-0 2.224642 4x12x2-20+4x8x30-30 1.425497 56.06079844

Modifications: -DINTEL_ALIGN64 - removed from AVX version; -fp-model fast=1 -> fast=2         

1x12x2-20+1x8x30-30

1    2   3   4   5   6   7    8

For the equation above, 1 corresponds to the first number in the equation, 2 corresponds to the second, etc. Below is the legend for what each number represents.

1 number of nodes

2 number of ranks on the host

3 number of omp threads/rank

4 number of tiles

5 number of knc cards

6 number of mpi ranks/card

7 number of omp threads/rank

8 number of tiles

Source:  Intel Internal Testing TR2054

Additional information: 1 2 3 4 5

Product and Performance Information

open

1. Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations, and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more information, go to www.intel.com/performance.

2. Intel does not control or audit the design or implementation of third party benchmarks or websites referenced in this document. Intel encourages all of its customers to visit the referenced websites or others where similar performance benchmarks are reported and confirm whether the referenced benchmarks are accurate and reflect performance of systems available for purchase.

3. Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. See www.intel.com/content/www/us/en/processors/processor-numbers.html for details.

4. Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel® microprocessors. These optimizations include SSE2 and SSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel® microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product user and reference guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804

5. Different hardware architectures may require different source code. Results are based on Intel’s best efforts to use code optimized to run on all architectures and perform the same work. Future code optimizations may result in different results. Microprocessor-dependent optimizations in this product are intended for use with Intel® microprocessors. Certain optimizations not specific to Intel® microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product user and reference guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804